A chip structure comprising a semiconductor substrate, a plurality of dielectric layers, a plurality of circuit layers, a passivation layer, a metal layer and at least a bump. The semiconductor substrate has a plurality of electronic devices positioned on a surface layer of the semiconductor substrate....http://www.google.com.tw/patents/US7855461?utm_source=gb-gplus-share專利 US7855461 - Chip structure with bumps and testing pads
