MAP decoder with cascade architecture. Iterative Turbo decoders can use two such cascade MAP decoders with feedback in conjunction with interleaver and deinterleaver where the MAP decoders generate extrinsic information for iterations. The cascade architecture limits the required number of max* blocks...http://www.google.com.tw/patents/US7020827?utm_source=gb-gplus-share專利 US7020827 - Cascade map decoder and method
