The present invention relates to a wide-bit memory output structure that comprises a chip having a plurality of output driver circuit cells. Each of the output driver circuit cells includes a power node, a ground node, and a signal node that are connected to respectively a first power line, a first ground...http://www.google.com.tw/patents/US6399975?utm_source=gb-gplus-share專利 US6399975 - Wide bit memory using post passivation interconnection scheme
