A logic simulation system capable of handling a very large scale circuit while realizing a high speed simulation by retaining the parallelism of the simulation targets. The system includes: a host computer having data of the simulation target divided into a plurality of sections defining different simulation...http://www.google.com.tw/patents/US5572710?utm_source=gb-gplus-share專利 US5572710 - High speed logic simulation system using time division emulation suitable for large scale logic circuits
