Provides within a semiconductor chip a plurality of internal DRAM arrays connected to each section data bus. A cross-point switch simultaneously connects the plural section data buses to a corresponding plurality of port registers that transfer data between a plurality of ports (I/O pins) on the chip...http://www.google.com.tw/patents/US5875470?utm_source=gb-gplus-share專利 US5875470 - Multi-port multiple-simultaneous-access DRAM chip
