A low voltage CMOS multiplier uses a transconductance stage to generate a dynamic bias current which is used to compensate for non-linear terms in a Gilbert Cell multiplier circuit. Common mode dependence is minimized by using balanced differential input stages for both the transconductance and multiplier...http://www.google.com.tw/patents/US5872446?utm_source=gb-gplus-share專利 US5872446 - Low voltage CMOS analog multiplier with extended input dynamic range
