Clock generating circuitry comprises a first frequency multiplier for multiplying the frequency of a reference clock applied thereto by 2n, where n is a natural integer, and for furnishing the frequency-multiplied clock, a frequency divider for dividing the frequency of the frequency-multiplied clock...http://www.google.com.tw/patents/US6188258?utm_source=gb-gplus-share專利 US6188258 - Clock generating circuitry