In a cache tag integrated on an SRAM with a memory cache, laser fuses are programmed to indicate which, if any, tag subarrays in the cache tag are not functioning properly. In addition, the burst length of the SRAM is increased to reduce the number of tag subarrays necessary for operation of the cache...http://www.google.com.tw/patents/US7089375?utm_source=gb-gplus-share專利 US7089375 - Device and method for configuring a cache tag in accordance with burst length
