A PLD with LAB interconnect lines that span adjacent LABs in the array and that have the ability to interconnect two logic elements in the different LABs. The PLD includes a plurality of LABs arranged in an array and a plurality of inter-LAB lines interconnecting the LABs of the array. Each of the LABs...http://www.google.com.tw/patents/US7456653?utm_source=gb-gplus-share專利 US7456653 - Programmable logic device having logic array block interconnect lines that can interconnect logic elements in different logic blocks
