In a cache memory of a super-scalar or VLIW processor to concurrently process a plurality of memory accesses, to provide a memory capable of multi-port access operation, there is provided a unit which subdivides the cache memory into a plurality of memory banks for concurrent operations thereof and which...http://www.google.com.tw/patents/US6282505?utm_source=gb-gplus-share專利 US6282505 - Multi-port memory and a data processor accessing the same
