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United States Patent [19] [11] Patent Number: 4,962,483

Lodhi [45] Date of Patent: Oct. 9,1990

[54] CASCADING FIFO MEMORY DEVICES FOR SEQUENTIAL STORING

[75] Inventor: Nusra Lodhi, Sunnyvale, Calif.

[73] Assignee: Advanced Micro Devices, Inc.,

Sunnyvale, Calif.

[21] Appl. No.: 373,743
[22] Filed: Jun. 29,1989

Related U.S. Application Data

[62] Division of Ser. No. 908,559, Sep. 18, 1986, Pat. No. 4,847,812.

[51] Int. C1.5 G11C 7/00

[52] U.S. CI 365/221; 365/78;

365/230.03; 365/239; 365/189.02; 377/70

[58] Field of Search 365/78, 221, 73, 236,

365/230.05, 239, 189.02, 230.02, 230.03;

307/481, 229; 377/64-77

[56] References Cited

U.S. PATENT DOCUMENTS

4,344,132 8/1982 Dixon et al 364/200 X

4,377,843 3/1983 Garringer et al 364/200 X

4,493,053 1/1985 Thompson 364/900 X

4,694,426 9/1987 Mason 365/78 X

4,809,161 2/1989 Torii et al 365/221

4,833,651 5/1989 Seltzer et al 365/230.05

4,833,655 5/1989 Wolfetal 365/73

4,839,866 6/1989 Ward et al 365/221 X

FOREIGN PATENT DOCUMENTS

63-219051 9/1988 Japan .

OTHER PUBLICATIONS

Electronic Design, Jun. 11, 1987, pp. 77-86, Electronic
Design Report "Rich w/Logic, Memory ICs Hone
Their Specialties" by Tunick.

Primary Examiner—James W. Moffitt
Assistant Examiner—Alfonso Garcia
Attorney, Agent, or Firm—Skjerven, Morrill
MacPherson, Franklin & Friel

[57] ABSTRACT

A FIFO memory device facilitates transfer of data between a host CPU and a peripheral device in one of a number of modes. In one mode, the FIFO memory device functions as two FIFO memories, one for passing data from the host CPU to the peripheral device, and one for passing data to the host CPU from the peripheral device. In another mode, the FIFO memory device functions as a single FIFO which facilitates passing data from the host CPU to the peripheral device or from to peripheral device to the host CPU. The FIFO includes two RAMs addressed by a set of address counters. Of importance, the host CPU can bypass the address counters to directly address each RAM, thereby reading data from or writing data into either RAM regardless of the state of the address counters.

5 Claims, 7 Drawing Sheets

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