(54) DIFFERENTIAL COLUMN READOUT SCHEME FOR CMOS APS PIXELS
(75) Inventors: Sandor L. Barna, Pasadena, CA (US);
Alex Krymski, La Crescenta, CA (US)
(73) Assignee: Micron Technology, Inc., Boise, ID (US)
( * ) Notice: Subject to any disclaimer, the term of this patent is extended or adjusted under 35 U.S.C. 154(b) by 0 days.
This patent is subject to a terminal disclaimer.
(21) Appl. No.: 11/167,076
(22) Filed: Jun. 27, 2005
(65) Prior Publication Data
US 2006/0175534 Al Aug. 10, 2006
Related U.S. Application Data
(63) Continuation of application No. 10/230,176, filed on Aug. 29, 2002, now Pat. No. 6,919,551.
(51) Int. CI.
H01L 27/00 (2006.01)
H04N 9/64 (2006.01)
(52) U.S. CI 250/214 R; 250/208.1;
(58) Field of Classification Search 250/208.1,
250/214 R; 348/245 See application file for complete search history.
(56) References Cited
U.S. PATENT DOCUMENTS
6,140,630 A 10/2000 Rhodes
The present invention provides an improved column readout circuitry and method of operation which minimizes substrate and other common mode noise during a read out operation. The circuit improves the consistency of the pixel to pixel output of the pixel array and increases the dynamic range of the pixel output. This is accomplished by obtaining a differential readout of the reset signal and integrated charge signal from a desired pixel along with the reset signal and charge signal from a reference circuit. In this manner common mode noise can be minimized by a combination of signals from the desired and reference pixels in the sample and hold aspect of the column circuitry. In one exemplary embodiment of the invention, a 3T pixel arrangement is used. In another exemplary embodiment, a 4T arrangement is used. Additional exemplary embodiments provide differential column readout circuitry that can be used with any two signal sources.
19 Claims, 24 Drawing Sheets