Apparatus and method for achieving reduced overhead mutual-exclusion and ...

[54] APPARATUS AND METHOD FOR ACHIEVING REDUCED OVERHEAD MUTUAL-EXCLUSION AND MAINTAINING COHERENCY IN A MULTIPROCESSOR SYSTEM UTILIZING EXECUTION HISTORY AND THREAD MONITORING

[75] Inventors: John D. Slingwine; Paul E.

McKenncy, both of Beaverton, Oreg.

[73] Assignee: Sequent Computer Systems, Inc.,
Beaverton. Oreg.

[21] Appl. No.: 742,613
[22] Filed: Nov. 1, 1996

Related U.S. Application Data

[62] Division of Ser. No. 480,627, Jim. 7, 1995, Pat. No. 5,608, 893, which is a division of Ser. No. 94,629, Jul. 19, 1993, Pat No. 5,442,758.

[51] Int CI.6 G06F 9/30; G06F 12/12

[52] U.S. CI 395/672; 395/474; 395/486

[58] Field of Search 395/474. 477.

395/672. 676. 451, 486, 485. 468. 476, 447. 448. 469. 470, 471^73

[56] References Cited

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OTHER PUBLICATIONS

Cache Coherence Protocols: Evaluation Using a Multiprocessor Simulation Model, James Archibald and Jean-Loup Baer, ACM Transactions on Computer Systems, vol. 4. No. 4. pp. 273-298. Nov.. 1986.

An Economical Solution to the Cache Coherence Problem, James Archibald and Jean-Loup Baer. Proc. 11th Annual Symposium on Computer Architecture. JEEE. pp. 355-362. 1984.

(List continued on next page.)

Primary Examiner—Matthew M. Kim

Attorney, Agent, or Firm—Klarquist Sparkman Campbell

Leigh & Whinston, LLP

[57] ABSTRACT

A substantially zero overhead mutual-exclusion apparatus and method (90, 120) is provided that allows concurrent reading and updating data while maintaining data coherency. That is, a data reading process executes the same sequence of instructions that would be executed if the data were never updated. Rather than depending exclusively on overheadimposing locks, this mutual-exclusion mechanism tracks an execution history (138) of a thread (16. 112) to determine safe times for processing a current generation (108, 130. 131) of data updates while a next generation (110,132.133) of data updates is concurrently being saved. A thread is any locus of control, such as a processor. A summary of thread activity (106,122) tracks which threads have passed through a quiescent state after the current generation of updates was started. When the last thread related to the current generation passes through a quiescent state, the summary of thread activity signals a callback processor (104.124) that it is safe to end the current generation of updates. The callback processor then processes and erases all updates in the current generation. The next generation of updates then becomes the current generation of updates. The callback processor restarts the summary of thread activity and initiates a new next generation of updates. All data-updating threads pass through a quiescent state between the time they attempt to update data and the time the data are actually updated.

11 Claims, 7 Drawing Sheets

OTHER PUBLICATIONS

Computer Architecture and Design, A.J. van de Goor, Addison-Wesley Publishers Limited, Workingham, England, pp. 473-506, 1989.

Symmetry Technical Summary, Sequent Computer Systems, Inc., Beaverton, Oregon, pp. 1.18, 1.19, 2.8. 2.9. 5.2-5.4, and A.4-A9, 1987.

A New Solution to Coherence Problems in Multicache Systems, Lucien M. Censier and Paul Feautrier. IEEE Transactions on Computers, vol. C-27, No. 12, pp. 1112-1118. Dec. 1978.

The Design of the UNIX Operating System, Maurice J. Bach. Prentice-Hall, Inc.. Englewood Cliffs, New Jersey, pp. 30. 31. 77, 96-103. and 391-410. 1986.