搜尋 圖片 地圖 Play YouTube 新聞 Gmail 雲端硬碟 更多 »
進階專利搜尋 | 網頁圖片 | 網頁紀錄 | 登入

專利

  

Illllllllllllllllllllllllllllllllllllllllllllllllll

US007715080B2

United States Patent

Natarajan et al.

(io) Patent No.: (45) Date of Patent:

US 7,715,080 B2 May 11, 2010

(56)

PACKAGING A MEMS DEVICE USING A
FRAME

Inventors: Bangalore R. Natarajan, Cupertino, CA
(US); Lauren Palmateer, San Francisco,
CA(US)

Assignee: QUALCOMM MEMS Technologies,

Inc., San Diego, CA (US)

Notice: Subject to any disclaimer, the term of this patent is extended or adjusted under 35 U.S.C. 154(b) by 62 days.

Appl.No.: 11/735,362

Filed: Apr. 13, 2007

Prior Publication Data

US 2007/0242345 Al Oct. 18, 2007

Related U.S. Application Data

Provisional application No. 60/791,730, filed on Apr. 13, 2006.

Int. CI.

G02F1/03 (2006.01)
G02B 26/00 (2006.01)

U.S. CI 359/245; 359/290

Field of Classification Search 359/245,

359/290

See application file for complete search history.
References Cited
U.S. PATENT DOCUMENTS

3,704,806 A 12/1972 Plachenov et al.

3,900,440 A 8/1975 Oharaetal.

4,036,360 A 7/1977 Deffeyes

4,074,480 A 2/1978 Burton

4,431,691 A 2/1984 Greenlee

4,531,126 A 7/1985 Sadones

4,552,806 A 11/1985 Hayashi et al.

4,950,344 A 8/1990 Glover etal.

[table][merged small][merged small][merged small][merged small]
[merged small][merged small][table][table][merged small][merged small][table][merged small]

Page 3

Jung et al., Soldered sealing process to assemble a protective cap for a MEMS CSP, Design, Test, Integration and Packaging of MEMS/ MOEMS 2003 Symposium, pp. 255-260.

Kim et al., Fabrication and characterization of a low-temperature hermetic MEMS package bonded by a closed loop AuSn solder-line, Proceedings of the IEEE 16fh Annual International Conference on Micro Electro Mechanical Systems, Jan. 2003, pp. 614-617. Maharbiz et al., Batch micropackaging by compression-bonded wafer-wafer transfer, Twelfth IEEE International Conference on Micro Electro Mechanical Systems, Jan. 17-21, 1999, pp. 482-489. Tao et al., Selective Bonding and encapsulation for wafer-level vacuum packaging of mems and related micro systems, Microelectronics and Reliability, 44(2):251-258, Feb. 2004. Tilmans et al., The indent reflow sealing (IRS) technique-A method for the fabrication of sealed cavities for mems devices, Journal of Microelectromechanical Systems, 9(2), Jun. 2000. Tominetti, et al., Moisture and impurities detection and removal in packaged MEMS, Proceedings of the SPIE, Reliability, Testing and Characterization of MEMS/MOEMS, Oct. 2001, pp. 215-225.

Yang et al., Localized induction heating solder bonding for wafer
level MEMS packaging, 17fh IEEE International Conference on
Micro Electro Mechanical Systems, Jan. 2004, pp. 729-732.
ISRandWO for PCT/US07/009271 filed Apr. 12, 2007.
IPRP for PCT/US07/009271 filed Apr. 12, 2007.
IPRP for PCT/US07/009275 filed Apr. 12, 2007.
Liang, Zhi-Hao et al., "A Low Temperature Wafer-Level Hermetic
MEMS Package Using UV Curable Adhesive", Electronic Compo-
nents and Technology Conference, 2004 IEEE, pp. 1486-1491.
Moraja, et al., Advanced Getter Solutions at Wafer Level to Assure
High Reliability to the last Generations MEMS, IEEE Reliability
Physics Symposium Proceedings, 2003, pp. 458-459.
Sparks, et al. Chip-Level Vacuum Packaging of Micromachines
Using NanoGetters, IEEE Transactions on Advanced Packaging, vol.
26 Issue 3, Aug. 2003, pp. 277-282.

Office Actionfiled in U.S. Appl. No. 11/734,730, dated Jan. 26,2009.
Office Action dated Aug. 4, 2009 in U.S. Appl. No. 11/734,730.

* cited by examiner

[graphic][merged small]
« 上一頁繼續 »