(19) United States
(12) Patent Application Publication (io) Pub. No.: US 2002/0168875 Al
Chang et al. (43) Pub. Date: Nov. 14,2002
(54) METHOD FOR FABRICATING AN ONO LAYER OF AN NROM
(76) Inventors: Kent Kuohua Chang, Taipei City
(TW); Uway Tseng, Tai-Chung Hsien
(TW)
Correspondence Address:
NAIPO (NORTH AMERICA
INTERNATIONAL PATENT OFFICE)
P.O. BOX 506
MERRIFIELD, VA 22116 (US)
(21) Appl. No.: 09/851,570
(22) Filed: May 10, 2001
Publication Classification (51) Int. CI.7 H01L 21/31; H01L 21/469
(52) U.S. CI 438/786; 438/778
(57) ABSTRACT
The present invention fabricates an oxide-nitride-oxide (ONO) layer of an NROM. A first oxide layer is formed on the surface of the substrate of a semiconductor wafer. Then two CVD processes are performed to respectively form a first nitride layer and a second nitride layer on the surface of the first oxide layer, and the boundary between the second nitride layer and the first nitride layer is so forming an interface. Thereafter, a second oxide layer is formed on the surface of the second nitride layer completing the process of manufacturing the ONO layer. The second nitride layer and the first nitride layer are used as a floating gate of the NROM, and the interface is used as a deep charge trapping center to improve the charge trapping efficiency, and furthermore, to improve the endurance and reliability of the NROM.
