DE602004024499D1 - Speichersteuerung, die Prozessorenergiezustände berücksichtigt - Google Patents
Speichersteuerung, die Prozessorenergiezustände berücksichtigtInfo
- Publication number
- DE602004024499D1 DE602004024499D1 DE602004024499T DE602004024499T DE602004024499D1 DE 602004024499 D1 DE602004024499 D1 DE 602004024499D1 DE 602004024499 T DE602004024499 T DE 602004024499T DE 602004024499 T DE602004024499 T DE 602004024499T DE 602004024499 D1 DE602004024499 D1 DE 602004024499D1
- Authority
- DE
- Germany
- Prior art keywords
- accounts
- memory controller
- processor
- energy conditions
- processor energy
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
- G06F1/26—Power supply means, e.g. regulation thereof
- G06F1/32—Means for saving power
- G06F1/3203—Power management, i.e. event-based initiation of a power-saving mode
- G06F1/3234—Power saving characterised by the action undertaken
- G06F1/325—Power saving in peripheral device
- G06F1/3275—Power saving in memory, e.g. RAM, cache
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
- G06F1/26—Power supply means, e.g. regulation thereof
- G06F1/32—Means for saving power
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
- G06F1/26—Power supply means, e.g. regulation thereof
- G06F1/32—Means for saving power
- G06F1/3203—Power management, i.e. event-based initiation of a power-saving mode
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
- Y02D10/00—Energy efficient computing, e.g. low power processors, power management or thermal management
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
- Y02D30/00—Reducing energy consumption in communication networks
- Y02D30/50—Reducing energy consumption in communication networks in wire-line communication networks, e.g. low power modes or reduced link rate
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US10/340,020 US6971034B2 (en) | 2003-01-09 | 2003-01-09 | Power/performance optimized memory controller considering processor power states |
| PCT/US2004/000092 WO2004063916A2 (en) | 2003-01-09 | 2004-01-02 | Memory controller considering processor power states |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| DE602004024499D1 true DE602004024499D1 (de) | 2010-01-21 |
Family
ID=32711225
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| DE602004024499T Expired - Lifetime DE602004024499D1 (de) | 2003-01-09 | 2004-01-02 | Speichersteuerung, die Prozessorenergiezustände berücksichtigt |
Country Status (10)
| Country | Link |
|---|---|
| US (1) | US6971034B2 (de) |
| EP (1) | EP1581856B1 (de) |
| JP (1) | JP4376897B2 (de) |
| KR (1) | KR100692345B1 (de) |
| CN (1) | CN100399235C (de) |
| AT (1) | ATE451644T1 (de) |
| DE (1) | DE602004024499D1 (de) |
| HK (1) | HK1075520A1 (de) |
| TW (1) | TWI245180B (de) |
| WO (1) | WO2004063916A2 (de) |
Families Citing this family (80)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6976181B2 (en) * | 2001-12-20 | 2005-12-13 | Intel Corporation | Method and apparatus for enabling a low power mode for a processor |
| US20050050310A1 (en) * | 2003-07-15 | 2005-03-03 | Bailey Daniel W. | Method, system, and apparatus for improving multi-core processor performance |
| US7409572B1 (en) * | 2003-12-05 | 2008-08-05 | Lsi Corporation | Low power memory controller with leaded double data rate DRAM package arranged on a two layer printed circuit board |
| US7698575B2 (en) * | 2004-03-30 | 2010-04-13 | Intel Corporation | Managing power consumption by requesting an adjustment to an operating point of a processor |
| US7343502B2 (en) * | 2004-07-26 | 2008-03-11 | Intel Corporation | Method and apparatus for dynamic DLL powerdown and memory self-refresh |
| US7827424B2 (en) * | 2004-07-29 | 2010-11-02 | Ati Technologies Ulc | Dynamic clock control circuit and method |
| US7222253B2 (en) * | 2004-12-28 | 2007-05-22 | Intel Corporation | Dynamic power control for reducing voltage level of graphics controller component of memory controller based on its degree of idleness |
| US8593470B2 (en) * | 2005-02-24 | 2013-11-26 | Ati Technologies Ulc | Dynamic memory clock switching circuit and method for adjusting power consumption |
| US7523327B2 (en) * | 2005-03-05 | 2009-04-21 | Intel Corporation | System and method of coherent data transfer during processor idle states |
| US7800621B2 (en) * | 2005-05-16 | 2010-09-21 | Ati Technologies Inc. | Apparatus and methods for control of a memory controller |
| US7609567B2 (en) | 2005-06-24 | 2009-10-27 | Metaram, Inc. | System and method for simulating an aspect of a memory circuit |
| US8089795B2 (en) | 2006-02-09 | 2012-01-03 | Google Inc. | Memory module with memory stack and interface with enhanced capabilities |
| US8055833B2 (en) | 2006-10-05 | 2011-11-08 | Google Inc. | System and method for increasing capacity, performance, and flexibility of flash storage |
| US8090897B2 (en) | 2006-07-31 | 2012-01-03 | Google Inc. | System and method for simulating an aspect of a memory circuit |
| US8081474B1 (en) | 2007-12-18 | 2011-12-20 | Google Inc. | Embossed heat spreader |
| US9542352B2 (en) | 2006-02-09 | 2017-01-10 | Google Inc. | System and method for reducing command scheduling constraints of memory circuits |
| US8359187B2 (en) | 2005-06-24 | 2013-01-22 | Google Inc. | Simulating a different number of memory circuit devices |
| US20080028136A1 (en) | 2006-07-31 | 2008-01-31 | Schakel Keith R | Method and apparatus for refresh management of memory modules |
| US10013371B2 (en) | 2005-06-24 | 2018-07-03 | Google Llc | Configurable memory circuit system and method |
| US8796830B1 (en) | 2006-09-01 | 2014-08-05 | Google Inc. | Stackable low-profile lead frame package |
| US8397013B1 (en) | 2006-10-05 | 2013-03-12 | Google Inc. | Hybrid memory module |
| US8244971B2 (en) | 2006-07-31 | 2012-08-14 | Google Inc. | Memory circuit system and method |
| US8386722B1 (en) | 2008-06-23 | 2013-02-26 | Google Inc. | Stacked DIMM memory interface |
| US8060774B2 (en) | 2005-06-24 | 2011-11-15 | Google Inc. | Memory systems and memory modules |
| US9171585B2 (en) | 2005-06-24 | 2015-10-27 | Google Inc. | Configurable memory circuit system and method |
| US8327104B2 (en) | 2006-07-31 | 2012-12-04 | Google Inc. | Adjusting the timing of signals associated with a memory system |
| US8041881B2 (en) | 2006-07-31 | 2011-10-18 | Google Inc. | Memory device with emulated characteristics |
| US20080082763A1 (en) | 2006-10-02 | 2008-04-03 | Metaram, Inc. | Apparatus and method for power management of memory circuits by a system or component thereof |
| US8077535B2 (en) | 2006-07-31 | 2011-12-13 | Google Inc. | Memory refresh apparatus and method |
| US8111566B1 (en) | 2007-11-16 | 2012-02-07 | Google, Inc. | Optimal channel design for memory devices for providing a high-speed memory interface |
| US7386656B2 (en) | 2006-07-31 | 2008-06-10 | Metaram, Inc. | Interface circuit system and method for performing power management operations in conjunction with only a portion of a memory circuit |
| US8438328B2 (en) | 2008-02-21 | 2013-05-07 | Google Inc. | Emulation of abstracted DIMMs using abstracted DRAMs |
| US8130560B1 (en) | 2006-11-13 | 2012-03-06 | Google Inc. | Multi-rank partial width memory modules |
| US9507739B2 (en) | 2005-06-24 | 2016-11-29 | Google Inc. | Configurable memory circuit system and method |
| US7392338B2 (en) | 2006-07-31 | 2008-06-24 | Metaram, Inc. | Interface circuit system and method for autonomously performing power management operations in conjunction with a plurality of memory circuits |
| US8335894B1 (en) | 2008-07-25 | 2012-12-18 | Google Inc. | Configurable memory system with interface circuit |
| KR100656353B1 (ko) | 2005-07-12 | 2006-12-11 | 한국전자통신연구원 | 메모리 전력 소모를 줄이는 방법 |
| GB2444663B (en) | 2005-09-02 | 2011-12-07 | Metaram Inc | Methods and apparatus of stacking drams |
| US7925907B1 (en) * | 2005-12-12 | 2011-04-12 | Nvidia Corporation | Using non-lossless compression to save power |
| US7613941B2 (en) * | 2005-12-29 | 2009-11-03 | Intel Corporation | Mechanism for self refresh during advanced configuration and power interface (ACPI) standard C0 power state |
| US9632929B2 (en) | 2006-02-09 | 2017-04-25 | Google Inc. | Translating an address associated with a command communicated between a system and memory circuits |
| KR100817316B1 (ko) * | 2006-02-15 | 2008-03-31 | 엠텍비젼 주식회사 | 휴대형 장치 및 공유 메모리의 리프레쉬 제어 방법 |
| US7624349B2 (en) * | 2006-03-21 | 2009-11-24 | Microsoft Corporation | Declarative definition enabling graphical designer reuse |
| US8314806B2 (en) * | 2006-04-13 | 2012-11-20 | Intel Corporation | Low power display mode |
| US7724589B2 (en) | 2006-07-31 | 2010-05-25 | Google Inc. | System and method for delaying a signal communicated from a system to at least one of a plurality of memory circuits |
| US7849334B2 (en) * | 2006-09-29 | 2010-12-07 | Intel Coporation | Transitioning a computing platform to a low power system state |
| KR101314600B1 (ko) * | 2006-10-17 | 2013-10-14 | 엘지전자 주식회사 | 이미지 디스플레이 장치 및 방법 |
| US8458429B2 (en) * | 2006-12-31 | 2013-06-04 | Texas Instruments Incorporated | Memory controller idle mode |
| US20080184047A1 (en) * | 2007-01-25 | 2008-07-31 | Goeltzenleuchter Courtney D | System and method for implementing a quiet operating mode in a computing system |
| US7849342B2 (en) * | 2007-05-01 | 2010-12-07 | Nvidia Corporation | Method and system for implementing generalized system stutter |
| US8209479B2 (en) | 2007-07-18 | 2012-06-26 | Google Inc. | Memory circuit system and method |
| US8527709B2 (en) * | 2007-07-20 | 2013-09-03 | Intel Corporation | Technique for preserving cached information during a low power mode |
| US8080874B1 (en) | 2007-09-14 | 2011-12-20 | Google Inc. | Providing additional space between an integrated circuit and a circuit board for positioning a component therebetween |
| US7913100B2 (en) * | 2007-09-29 | 2011-03-22 | Intel Corporation | Opportunistic initiation of data traffic |
| JP2009122828A (ja) * | 2007-11-13 | 2009-06-04 | Fuji Xerox Co Ltd | 中央処理装置、制御装置、及びプログラム |
| US8243085B2 (en) * | 2007-12-30 | 2012-08-14 | Intel Corporation | Boosting graphics performance based on executing workload |
| US8284179B2 (en) * | 2008-02-21 | 2012-10-09 | Himax Technologies Limited | Timing controller for reducing power consumption and display device having the same |
| US8199158B2 (en) * | 2008-06-11 | 2012-06-12 | Intel Corporation | Performance allocation method and apparatus |
| US8412866B2 (en) * | 2008-11-24 | 2013-04-02 | Via Technologies, Inc. | System and method of dynamically switching queue threshold |
| US9865233B2 (en) | 2008-12-30 | 2018-01-09 | Intel Corporation | Hybrid graphics display power management |
| KR101525589B1 (ko) * | 2009-04-23 | 2015-06-03 | 삼성전자주식회사 | 데이터 저장 장치 및 그것을 포함하는 정보 처리 시스템 |
| EP2441007A1 (de) | 2009-06-09 | 2012-04-18 | Google, Inc. | Programmierung von dimm-abschlusswiderstandswerten |
| US8269525B2 (en) * | 2009-11-17 | 2012-09-18 | Ati Technologies Ulc | Logic cell having reduced spurious toggling |
| US9041720B2 (en) * | 2009-12-18 | 2015-05-26 | Advanced Micro Devices, Inc. | Static image retiling and power management method and circuit |
| US8850236B2 (en) * | 2010-06-18 | 2014-09-30 | Samsung Electronics Co., Ltd. | Power gating of cores by an SoC |
| US8799685B2 (en) | 2010-08-25 | 2014-08-05 | Advanced Micro Devices, Inc. | Circuits and methods for providing adjustable power consumption |
| US8417979B2 (en) * | 2010-12-23 | 2013-04-09 | Western Digital Technologies, Inc. | Method and system for progressive power reduction of inactive device while maintaining ready status with host |
| US8862906B2 (en) * | 2011-04-01 | 2014-10-14 | Intel Corporation | Control of platform power consumption using coordination of platform power management and display power management |
| JP2013037697A (ja) * | 2011-08-09 | 2013-02-21 | Samsung Electronics Co Ltd | 電子装置及びマイクロコントローラ並びにそれらの制御方法 |
| US9400545B2 (en) | 2011-12-22 | 2016-07-26 | Intel Corporation | Method, apparatus, and system for energy efficiency and energy conservation including autonomous hardware-based deep power down in devices |
| US8806243B2 (en) * | 2011-12-28 | 2014-08-12 | Intel Corporation | Method of and apparatus for energy savings associated with a graphics core |
| US9275601B2 (en) | 2012-12-12 | 2016-03-01 | Intel Corporation | Techniques to control frame display rate |
| US11372672B2 (en) * | 2013-02-15 | 2022-06-28 | Apple Inc. | Centralized task scheduling |
| US20140240328A1 (en) * | 2013-02-26 | 2014-08-28 | Prasoonkumar Surti | Techniques for low energy computation in graphics processing |
| US9026698B2 (en) * | 2013-03-15 | 2015-05-05 | Intel Corporation | Apparatus, system and method for providing access to a device function |
| US20150317263A1 (en) * | 2014-04-30 | 2015-11-05 | Texas Instruments Incorporated | Systems and methods for controlling a memory performance point |
| US9711192B2 (en) | 2014-11-03 | 2017-07-18 | Samsung Electronics Co., Ltd. | Memory device having different data-size access modes for different power modes |
| US10074203B2 (en) | 2014-12-23 | 2018-09-11 | Synaptics Incorporated | Overlay for display self refresh |
| CN111954901B (zh) | 2018-04-24 | 2023-05-05 | 惠普发展公司，有限责任合伙企业 | 包括用于选择列像素数据的开关的显示设备 |
| US20210064119A1 (en) * | 2019-08-26 | 2021-03-04 | Micron Technology, Inc. | Bank configurable power modes |
Family Cites Families (28)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2002032163A (ja) * | 1990-03-23 | 2002-01-31 | Matsushita Electric Ind Co Ltd | 情報処理装置 |
| JP2549765B2 (ja) * | 1990-11-30 | 1996-10-30 | シチズン時計株式会社 | マイクロコンピュータ |
| US5423045A (en) * | 1992-04-15 | 1995-06-06 | International Business Machines Corporation | System for distributed power management in portable computers |
| AU3313795A (en) * | 1994-10-14 | 1996-04-26 | Compaq Computer Corporation | Circuit for placing a cache memory into low power mode in response to special bus cycles |
| US5615162A (en) * | 1995-01-04 | 1997-03-25 | Texas Instruments Incorporated | Selective power to memory |
| US5757365A (en) * | 1995-06-07 | 1998-05-26 | Seiko Epson Corporation | Power down mode for computer system |
| EP0855718A1 (de) * | 1997-01-28 | 1998-07-29 | Hewlett-Packard Company | Speichersteuerung in niedrigem Verbrauchsmodus |
| JPH1186548A (ja) * | 1997-09-16 | 1999-03-30 | Mitsubishi Electric Corp | 半導体記憶装置 |
| US5835435A (en) * | 1997-12-02 | 1998-11-10 | Intel Corporation | Method and apparatus for dynamically placing portions of a memory in a reduced power consumtion state |
| US6243817B1 (en) * | 1997-12-22 | 2001-06-05 | Compaq Computer Corporation | Device and method for dynamically reducing power consumption within input buffers of a bus interface unit |
| JPH11282587A (ja) * | 1998-03-26 | 1999-10-15 | Canon Inc | メモリーバックアップ装置 |
| US6460125B2 (en) * | 1998-08-07 | 2002-10-01 | Ati Technologies, Inc. | Dynamic memory clock control system and method |
| KR100273111B1 (ko) * | 1998-08-19 | 2000-12-01 | 윤종용 | 그래픽 메모리 장치의 리프레쉬 제어방법 및 회로 |
| JP2000174690A (ja) * | 1998-12-08 | 2000-06-23 | Kyocera Corp | 携帯無線端末 |
| JP2000214966A (ja) * | 1999-01-20 | 2000-08-04 | Ricoh Co Ltd | 携帯型情報処理装置 |
| US6657634B1 (en) * | 1999-02-25 | 2003-12-02 | Ati International Srl | Dynamic graphics and/or video memory power reducing circuit and method |
| JP4056173B2 (ja) * | 1999-04-14 | 2008-03-05 | 富士通株式会社 | 半導体記憶装置および該半導体記憶装置のリフレッシュ方法 |
| US6208577B1 (en) * | 1999-04-16 | 2001-03-27 | Micron Technology, Inc. | Circuit and method for refreshing data stored in a memory cell |
| US6418535B1 (en) * | 1999-04-28 | 2002-07-09 | International Business Machines Corporation | Bi-level power saver method for portable or laptop computer |
| US6848058B1 (en) * | 1999-06-04 | 2005-01-25 | Ati International Srl | Power reduction circuit and method with multi clock branch control |
| US6820209B1 (en) * | 1999-07-15 | 2004-11-16 | Apple Computer, Inc. | Power managed graphics controller |
| US6633987B2 (en) * | 2000-03-24 | 2003-10-14 | Intel Corporation | Method and apparatus to implement the ACPI(advanced configuration and power interface) C3 state in a RDRAM based system |
| US6795896B1 (en) * | 2000-09-29 | 2004-09-21 | Intel Corporation | Methods and apparatuses for reducing leakage power consumption in a processor |
| KR100374641B1 (ko) * | 2000-11-24 | 2003-03-04 | 삼성전자주식회사 | 스탠바이 모드에서 지연동기 루프회로의 전력소모를감소시키기 위한 제어회로를 구비하는 반도체 메모리장치및 이의 파우워 다운 제어방법 |
| US6845432B2 (en) * | 2000-12-28 | 2005-01-18 | Intel Corporation | Low power cache architecture |
| JP2002311918A (ja) * | 2001-04-18 | 2002-10-25 | Seiko Epson Corp | 液晶表示装置 |
| US6646942B2 (en) * | 2001-10-09 | 2003-11-11 | Micron Technology, Inc. | Method and circuit for adjusting a self-refresh rate to maintain dynamic data at low supply voltages |
| US6894691B2 (en) * | 2002-05-01 | 2005-05-17 | Dell Products L.P. | Dynamic switching of parallel termination for power management with DDR memory |
-
2003
- 2003-01-09 US US10/340,020 patent/US6971034B2/en active Active
-
2004
- 2004-01-02 JP JP2006500783A patent/JP4376897B2/ja not_active Expired - Fee Related
- 2004-01-02 CN CNB2004800020211A patent/CN100399235C/zh not_active Expired - Fee Related
- 2004-01-02 AT AT04700069T patent/ATE451644T1/de not_active IP Right Cessation
- 2004-01-02 WO PCT/US2004/000092 patent/WO2004063916A2/en active Application Filing
- 2004-01-02 DE DE602004024499T patent/DE602004024499D1/de not_active Expired - Lifetime
- 2004-01-02 KR KR1020057012853A patent/KR100692345B1/ko not_active IP Right Cessation
- 2004-01-02 EP EP04700069A patent/EP1581856B1/de not_active Expired - Lifetime
- 2004-01-05 TW TW093100151A patent/TWI245180B/zh not_active IP Right Cessation
-
2005
- 2005-10-29 HK HK05109645.5A patent/HK1075520A1/xx not_active IP Right Cessation
Also Published As
| Publication number | Publication date |
|---|---|
| WO2004063916A3 (en) | 2005-04-14 |
| KR20050091777A (ko) | 2005-09-15 |
| CN1723430A (zh) | 2006-01-18 |
| WO2004063916A2 (en) | 2004-07-29 |
| JP4376897B2 (ja) | 2009-12-02 |
| US20040139359A1 (en) | 2004-07-15 |
| TWI245180B (en) | 2005-12-11 |
| ATE451644T1 (de) | 2009-12-15 |
| JP2006517315A (ja) | 2006-07-20 |
| CN100399235C (zh) | 2008-07-02 |
| EP1581856A2 (de) | 2005-10-05 |
| TW200421077A (en) | 2004-10-16 |
| HK1075520A1 (en) | 2005-12-16 |
| US6971034B2 (en) | 2005-11-29 |
| EP1581856B1 (de) | 2009-12-09 |
| KR100692345B1 (ko) | 2007-03-12 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| DE602004024499D1 (de) | Speichersteuerung, die Prozessorenergiezustände berücksichtigt | |
| MY134470A (en) | Anticipatory power control of memory | |
| EP2109028A3 (de) | Betriebsverwaltungsverfahren und -vorrichtungen in Informationsverarbeitungssystemen | |
| GB2462046A (en) | Dynamic processor power management device and method thereof | |
| ATE545898T1 (de) | Robotersystem | |
| GB2436769B (en) | Method and apparatus for adjusting a duty cycle to save power in a computing system | |
| TW200620857A (en) | Method and system for reducing power consumption of IrDA enabled handsets by turning ON/OFF an IrDA port dynamically | |
| TW200731276A (en) | Dynamic memory sizing for power reduction | |
| EP1616240A4 (de) | System für den betrieb drahtloser lan-schnittstellen mit niedriger stromaufnahme | |
| TW200705165A (en) | System and method of coherent data transfer during processor idle states | |
| EP2036221A4 (de) | Auf verfügbarem batteriestrom basierende adaptive drx-zykluslänge | |
| TW200703931A (en) | Apparatus and methods for control of sleep modes in a transceiver | |
| WO2011034351A3 (en) | Apparatus and method for reducing power consumption in portable terminal | |
| WO2003050667A3 (en) | System for shared power supply in computer peripheral devices | |
| TW200742019A (en) | IC with on-die power-gating circuit | |
| MX2012008736A (es) | Reduccion de energia de memoria en un estado inactivo. | |
| MX2007003552A (es) | Precarga de datos. | |
| TW200834298A (en) | System, method, and computer program product for saving power in a multi-graphics processor environment | |
| TW200627117A (en) | PWM power supply controller and method therefor | |
| ATE426852T1 (de) | Energiesparverfahren und -system | |
| WO2008044945A3 (en) | Integrated utility system | |
| EP2267575A3 (de) | Elektronische Vorrichtung zur Verringerung des Energieverbrauchs einer Computerhauptplatine und Hauptplatine damit | |
| ATE523846T1 (de) | Konfigurierbare serielle speicherschnittstelle | |
| TW200517821A (en) | Structure of dynamic management device power source and its method | |
| ATE467183T1 (de) | Busverbindungseinrichtung |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| 8364 | No opposition during term of opposition |