US6226740B1 - Information processing apparatus and method that uses first and second power supplies for reducing booting time - Google Patents
Information processing apparatus and method that uses first and second power supplies for reducing booting time Download PDFInfo
- Publication number
- US6226740B1 US6226740B1 US09/216,610 US21661098A US6226740B1 US 6226740 B1 US6226740 B1 US 6226740B1 US 21661098 A US21661098 A US 21661098A US 6226740 B1 US6226740 B1 US 6226740B1
- Authority
- US
- United States
- Prior art keywords
- power supply
- high speed
- turned
- storage device
- storage element
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
- 230000010365 information processing Effects 0.000 title claims abstract description 24
- 238000000034 method Methods 0.000 title claims description 14
- 238000010586 diagram Methods 0.000 description 4
Images
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/44—Arrangements for executing specific programs
- G06F9/4401—Bootstrapping
Definitions
- the present invention relates to an information processing apparatus and a method for booting the same. More particularly, the present invention relates to an information processing apparatus having a first power supply for supplying power only in a normal operating state and a second power supply for supplying power not only in a normal operating state but also in a power supply off state and a method for booting the same.
- BIOS basic input/output system
- ROM read only memory
- Such a conventional information processing apparatus has a problem in that a long time is spent before the apparatus is booted because the BIOS codes stored in the ROM are read at a low speed and hence the user must spend wasteful time until the apparatus is booted.
- An information processing apparatus comprises:
- a host controller connected to the processor, the host controller reading out codes stored in the storage device to boot the apparatus when the first power supply is turned on;
- a second power supply for supplying power to each of the host controller and the high speed storage element at all times whether the first power supply is turned on or turned off;
- a controller for reading out codes stored in advance in the high speed storage element having the same storage contents as those in the storage device to boot the apparatus when the first power supply is turned on.
- a method for booting an information processing apparatus in which a host controller connected to a processor reads codes stored in a storage device to boot the apparatus when a first power supply is turned on, comprises the steps of:
- the time required for booting can be significantly reduced compared to the related art.
- the storage contents of the high speed storage element are cleared during the period from a system terminating operation until the time at which the first power supply is turned off as a result of the system terminating operation; thereafter, a process is performed to copy the codes used for booting read out from the storage device into the high speed storage element and set a write protect therein; and, when the first power supply is turned on again thereafter, booting is carried out using the codes read out from the high speed storage element and the write protect is cancelled. Since this makes it possible to use an existing high speed storage element for booting, the present invention can be carried out at a low cost without the need for additional components.
- FIG. 1 is a configuration diagram showing the principle of the present invention
- FIG. 2 is a block diagram of an embodiment of the present invention.
- FIG. 3 is a flow chart illustrating the operation of the embodiment shown in FIG. 2 .
- FIG. 1 is a block diagram of a first embodiment of the present invention.
- an information processing apparatus according to the embodiment of the present invention comprises a processor 11 , a host controller 12 , a read only memory (ROM) 13 which is a storage device, and a high speed storage element 21 .
- the processor 11 , host controller 12 and ROM 13 are provided in a V CC power supply circuit 10 to which power is supplied from a V CC power supply as a first power supply only in a normal operating state.
- the host controller 12 and high speed storage element 21 are provided in a V EE power supply circuit 20 to which power is supplied from a V EE power supply as a second power supply not only in a normal operating state but also when the V CC power supply is off. That is, power is supplied to the host controller 12 from both of the V CC and V EE power supplies.
- the host controller 12 carries out centralized control over the operation of the information processing apparatus as a whole.
- Codes to be read to boot the information processing apparatus are stored in the ROM 13 in advance.
- Codes having the same storage contents as those stored in the ROM 13 are stored in advance in the high speed storage element 21 which is configured such that it can be read out at a much higher speed than the ROM 13 .
- the storage contents of the high speed storage element 21 are read out to boot the apparatus when the V CC power supply is turned on after the V CC power supply is once turned off.
- the storage contents of the high speed storage element 21 are cleared during the period from a system terminating operation until the time at which the first power supply V CC is turned off as a result of the system terminating operation under the control of the host controller 12 . Thereafter, a process is performed to copy the codes used for booting read out from the ROM 13 into the high speed storage element 21 and set write protect therein.
- booting is carried out using the codes read out from the high speed storage element 21 and the write protect is cancelled. This makes it possible to use an existing high speed storage element for booting.
- FIG. 2 is a block diagram of an information processing apparatus according to the second embodiment of the present invention.
- the information processing apparatus comprises a processor 11 , a host controller 12 , a ROM 13 , a system memory 14 and a cache memory (hereinafter referred to as “cache”) 22 .
- the processor 11 , the host controller 12 , the ROM 13 and the system memory 14 are provided in a V CC power supply circuit 10 to which power is supplied from a V CC power supply only in a normal operating state.
- the host controller 12 and cache 22 are provided in a V EE power supply circuit 20 to which power is supplied from a V EE power supply not only in a normal operating state but also when the V CC power supply is off.
- the cache 22 is a memory which is an example of the high speed storage element 21 , and write and read operations on the same is controlled by the host controller 12 .
- the same storage contents as those stored in the system memory 14 are stored in the cache 22 during a normal operation.
- a V EE power supply is first turned on (step 31 ) to supply power to each of the host controller 12 and the cache 22 not only in a normal operating state but also when the power supply to the information processing apparatus is off, thereby putting them in an operating state at all times. Then, the V CC power supply is turned on (step 32 ). Since this is the beginning of the use of the apparatus and a system boot mode has not been set by the user yet, the storage contents of the ROM 13 (BIOS codes) are read out in a default state (step 33 ).
- the present embodiment has a normal boot mode in which the storage contents of the ROM 13 are read out for booting and a high speed boot mode in which the storage contents of the cache 22 are read out for booting.
- step 36 If the user chooses to terminate the system thereafter (step 36 ), it is determined which boot mode has been set (step 37 ). If the user has set the normal mode described above, the host controller 12 is set such that it reads out the contents of the ROM 13 when booting is carried out (step 38 ). Therefore, the V CC power supply is turned off as a result of system termination (step 39 ). When the V CC power supply is turned on again later to use the apparatus (step 40 ), the host controller 12 reads out the storage contents of the ROM 13 for booting (steps 33 , 34 ).
- the host controller 12 is set in the high speed mode (step 41 ).
- the V CC power supply is turned off when the system is terminated. Since the contents of the system memory 14 have been written into the cache 22 until that time through a normal operation, the cache 22 is flushed to clear the storage contents (step 42 ) and, thereafter, the storage contents (BIOS codes) of the ROM 13 are copied to the cache 22 of the host controller 12 (step 43 ). In order to maintain the copied contents, the host controller 12 provides a write protect by adding a cache control signal 23 (step 44 ) during writing. The system is terminated after the process described above and, as a result, the V CC power supply is turned off (step 45 ).
- the host controller 12 reads out the storage contents (BIOS codes) of the cache 22 (step 47 ), cancels the write protect in the cache 22 with the cache control signal 23 when the reading-out is complete to enable the cache 22 to start operating as a normal cache (step 48 ) and boots the system (step 34 ).
- the apparatus starts a normal operation.
- booting is carried out using the contents of the cache 22 which can be read out at a high speed instead of the contents of the ROM 13 which is read out at a lower speed. This makes it possible to reduce the apparatus boot time significantly compared to the related art.
- an existing cache 22 which has been provided in an information processing apparatus is used as the high speed storage element 21 to be used for increasing the reading-out speed of the BIOS codes. This eliminates the need for any external additional circuit and therefore the need for additional components, which allows inexpensive configurations.
- the cache 22 Since the cache 22 is required to have the memory of the codes having the same storage contents of the ROM 13 when the V CC power supply is turned on after the V CC power supply is once turned off, it may be a dedicated memory in which the codes having the same storage contents of the ROM 13 are stored in advance.
Abstract
Description
Claims (3)
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP9350771A JPH11184703A (en) | 1997-12-19 | 1997-12-19 | Information processor and boot method |
JP9-350771 | 1997-12-19 |
Publications (1)
Publication Number | Publication Date |
---|---|
US6226740B1 true US6226740B1 (en) | 2001-05-01 |
Family
ID=18412764
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
US09/216,610 Expired - Fee Related US6226740B1 (en) | 1997-12-19 | 1998-12-21 | Information processing apparatus and method that uses first and second power supplies for reducing booting time |
Country Status (2)
Country | Link |
---|---|
US (1) | US6226740B1 (en) |
JP (1) | JPH11184703A (en) |
Cited By (25)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20010039612A1 (en) * | 1999-12-02 | 2001-11-08 | Lee Sang-Jin | Apparatus and method for fast booting |
US20020069354A1 (en) * | 2000-02-03 | 2002-06-06 | Fallon James J. | Systems and methods for accelerated loading of operating systems and application programs |
US6539456B2 (en) * | 1999-10-13 | 2003-03-25 | Intel Corporation | Hardware acceleration of boot-up utilizing a non-volatile disk cache |
US20030126427A1 (en) * | 2002-01-03 | 2003-07-03 | Samsung Electronics Co., Ltd. | Computer system and method for booting up the same |
US20040056783A1 (en) * | 1998-12-11 | 2004-03-25 | Fallon James J. | Content independent data compression method and system |
US20040073746A1 (en) * | 1999-03-11 | 2004-04-15 | Fallon James J. | System and methods for accelerated data storage and retrieval |
US20050138447A1 (en) * | 2003-12-09 | 2005-06-23 | Canon Kabushiki Kaisha | Image processing apparatus and control method therefor |
EP1630640A1 (en) * | 2003-04-17 | 2006-03-01 | Matsushita Electric Industrial Co., Ltd. | Start time reduction device and electronic device |
US20060098512A1 (en) * | 2004-11-09 | 2006-05-11 | Kabushiki Kaisha Toshiba | Electronic apparatus |
US20070005952A1 (en) * | 2005-06-30 | 2007-01-04 | Kuan-Jui Ho | Boot-up method for computer system |
US20070011443A1 (en) * | 2004-06-24 | 2007-01-11 | Fujitsu Limited | Computer startup method, program, storage medium, and information processing apparatus |
US20080086591A1 (en) * | 2006-10-06 | 2008-04-10 | Nec Infrontia Corporation | Quick start |
US20100005285A1 (en) * | 2006-07-31 | 2010-01-07 | Yun Dong-Goo | Computer system and method of booting the same |
US20100192010A1 (en) * | 2009-01-29 | 2010-07-29 | Funai Electric Co., Ltd. | Electronic device |
US7777651B2 (en) | 2000-10-03 | 2010-08-17 | Realtime Data Llc | System and method for data feed acceleration and encryption |
US20110016300A1 (en) * | 2009-07-14 | 2011-01-20 | Lee Joocheol | Apparatus and method for fast booting computer system |
US20110055539A1 (en) * | 2009-08-31 | 2011-03-03 | Nintendo Co., Ltd. | Information processing apparatus, and computer-readable storage medium having startup/shutdown control program stored therein |
US8054879B2 (en) | 2001-02-13 | 2011-11-08 | Realtime Data Llc | Bandwidth sensitive data compression and decompression |
US8275897B2 (en) | 1999-03-11 | 2012-09-25 | Realtime Data, Llc | System and methods for accelerated data storage and retrieval |
US20120254601A1 (en) * | 2011-03-28 | 2012-10-04 | Western Digital Technologies, Inc. | Disk drive booting from volatile semiconductor memory when exiting power save mode |
US20130139212A1 (en) * | 2011-11-30 | 2013-05-30 | Jun Yukawa | Information processing apparatus, broadcast receiving apparatus and software start-up method |
US8692695B2 (en) | 2000-10-03 | 2014-04-08 | Realtime Data, Llc | Methods for encoding and decoding data |
US9143546B2 (en) | 2000-10-03 | 2015-09-22 | Realtime Data Llc | System and method for data feed acceleration and encryption |
US9286079B1 (en) * | 2011-06-30 | 2016-03-15 | Western Digital Technologies, Inc. | Cache optimization of a data storage device based on progress of boot commands |
US20170142334A1 (en) * | 2015-11-16 | 2017-05-18 | Canon Kabushiki Kaisha | Communication apparatus, control method for the communication apparatus, and recording medium |
Families Citing this family (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN105960633B (en) * | 2014-02-07 | 2020-06-19 | 株式会社半导体能源研究所 | Semiconductor device, device and electronic apparatus |
Citations (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS62242257A (en) | 1986-04-15 | 1987-10-22 | Canon Inc | Backup system for system |
JPH0314153A (en) | 1989-06-13 | 1991-01-22 | Mitsubishi Electric Corp | Data processing system |
JPH04170647A (en) | 1990-11-05 | 1992-06-18 | Fujitsu Ltd | Diagnostic system for computer system |
JPH08161176A (en) | 1994-12-05 | 1996-06-21 | Hitachi Ltd | Restart processing method |
US5568641A (en) * | 1995-01-18 | 1996-10-22 | Hewlett-Packard Company | Powerfail durable flash EEPROM upgrade |
US6061788A (en) * | 1997-10-02 | 2000-05-09 | Siemens Information And Communication Networks, Inc. | System and method for intelligent and reliable booting |
US6115814A (en) * | 1997-11-14 | 2000-09-05 | Compaq Computer Corporation | Memory paging scheme for 8051 class microcontrollers |
-
1997
- 1997-12-19 JP JP9350771A patent/JPH11184703A/en active Pending
-
1998
- 1998-12-21 US US09/216,610 patent/US6226740B1/en not_active Expired - Fee Related
Patent Citations (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS62242257A (en) | 1986-04-15 | 1987-10-22 | Canon Inc | Backup system for system |
JPH0314153A (en) | 1989-06-13 | 1991-01-22 | Mitsubishi Electric Corp | Data processing system |
JPH04170647A (en) | 1990-11-05 | 1992-06-18 | Fujitsu Ltd | Diagnostic system for computer system |
JPH08161176A (en) | 1994-12-05 | 1996-06-21 | Hitachi Ltd | Restart processing method |
US5568641A (en) * | 1995-01-18 | 1996-10-22 | Hewlett-Packard Company | Powerfail durable flash EEPROM upgrade |
US6061788A (en) * | 1997-10-02 | 2000-05-09 | Siemens Information And Communication Networks, Inc. | System and method for intelligent and reliable booting |
US6115814A (en) * | 1997-11-14 | 2000-09-05 | Compaq Computer Corporation | Memory paging scheme for 8051 class microcontrollers |
Cited By (75)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US8717203B2 (en) | 1998-12-11 | 2014-05-06 | Realtime Data, Llc | Data compression systems and methods |
US7714747B2 (en) | 1998-12-11 | 2010-05-11 | Realtime Data Llc | Data compression systems and methods |
US10033405B2 (en) | 1998-12-11 | 2018-07-24 | Realtime Data Llc | Data compression systems and method |
US9054728B2 (en) | 1998-12-11 | 2015-06-09 | Realtime Data, Llc | Data compression systems and methods |
US8502707B2 (en) | 1998-12-11 | 2013-08-06 | Realtime Data, Llc | Data compression systems and methods |
US20040056783A1 (en) * | 1998-12-11 | 2004-03-25 | Fallon James J. | Content independent data compression method and system |
US8643513B2 (en) | 1998-12-11 | 2014-02-04 | Realtime Data Llc | Data compression systems and methods |
US8933825B2 (en) | 1998-12-11 | 2015-01-13 | Realtime Data Llc | Data compression systems and methods |
US20040073746A1 (en) * | 1999-03-11 | 2004-04-15 | Fallon James J. | System and methods for accelerated data storage and retrieval |
US8504710B2 (en) | 1999-03-11 | 2013-08-06 | Realtime Data Llc | System and methods for accelerated data storage and retrieval |
US8719438B2 (en) | 1999-03-11 | 2014-05-06 | Realtime Data Llc | System and methods for accelerated data storage and retrieval |
US8275897B2 (en) | 1999-03-11 | 2012-09-25 | Realtime Data, Llc | System and methods for accelerated data storage and retrieval |
US10019458B2 (en) | 1999-03-11 | 2018-07-10 | Realtime Data Llc | System and methods for accelerated data storage and retrieval |
US9116908B2 (en) | 1999-03-11 | 2015-08-25 | Realtime Data Llc | System and methods for accelerated data storage and retrieval |
US8756332B2 (en) | 1999-03-11 | 2014-06-17 | Realtime Data Llc | System and methods for accelerated data storage and retrieval |
US6662267B2 (en) | 1999-10-13 | 2003-12-09 | Intel Corporation | Hardware acceleration of boot-up utilizing a non-volatile disk cache |
US6539456B2 (en) * | 1999-10-13 | 2003-03-25 | Intel Corporation | Hardware acceleration of boot-up utilizing a non-volatile disk cache |
US20010039612A1 (en) * | 1999-12-02 | 2001-11-08 | Lee Sang-Jin | Apparatus and method for fast booting |
US7181608B2 (en) * | 2000-02-03 | 2007-02-20 | Realtime Data Llc | Systems and methods for accelerated loading of operating systems and application programs |
US8880862B2 (en) | 2000-02-03 | 2014-11-04 | Realtime Data, Llc | Systems and methods for accelerated loading of operating systems and application programs |
US8112619B2 (en) | 2000-02-03 | 2012-02-07 | Realtime Data Llc | Systems and methods for accelerated loading of operating systems and application programs |
US8090936B2 (en) | 2000-02-03 | 2012-01-03 | Realtime Data, Llc | Systems and methods for accelerated loading of operating systems and application programs |
US20020069354A1 (en) * | 2000-02-03 | 2002-06-06 | Fallon James J. | Systems and methods for accelerated loading of operating systems and application programs |
US9792128B2 (en) | 2000-02-03 | 2017-10-17 | Realtime Data, Llc | System and method for electrical boot-device-reset signals |
US9143546B2 (en) | 2000-10-03 | 2015-09-22 | Realtime Data Llc | System and method for data feed acceleration and encryption |
US9667751B2 (en) | 2000-10-03 | 2017-05-30 | Realtime Data, Llc | Data feed acceleration |
US9967368B2 (en) | 2000-10-03 | 2018-05-08 | Realtime Data Llc | Systems and methods for data block decompression |
US9859919B2 (en) | 2000-10-03 | 2018-01-02 | Realtime Data Llc | System and method for data compression |
US8717204B2 (en) | 2000-10-03 | 2014-05-06 | Realtime Data Llc | Methods for encoding and decoding data |
US8692695B2 (en) | 2000-10-03 | 2014-04-08 | Realtime Data, Llc | Methods for encoding and decoding data |
US10284225B2 (en) | 2000-10-03 | 2019-05-07 | Realtime Data, Llc | Systems and methods for data compression |
US8723701B2 (en) | 2000-10-03 | 2014-05-13 | Realtime Data Llc | Methods for encoding and decoding data |
US8742958B2 (en) | 2000-10-03 | 2014-06-03 | Realtime Data Llc | Methods for encoding and decoding data |
US10419021B2 (en) | 2000-10-03 | 2019-09-17 | Realtime Data, Llc | Systems and methods of data compression |
US9141992B2 (en) | 2000-10-03 | 2015-09-22 | Realtime Data Llc | Data feed acceleration |
US7777651B2 (en) | 2000-10-03 | 2010-08-17 | Realtime Data Llc | System and method for data feed acceleration and encryption |
US9762907B2 (en) | 2001-02-13 | 2017-09-12 | Realtime Adaptive Streaming, LLC | System and methods for video and audio data distribution |
US8867610B2 (en) | 2001-02-13 | 2014-10-21 | Realtime Data Llc | System and methods for video and audio data distribution |
US9769477B2 (en) | 2001-02-13 | 2017-09-19 | Realtime Adaptive Streaming, LLC | Video data compression systems |
US10212417B2 (en) | 2001-02-13 | 2019-02-19 | Realtime Adaptive Streaming Llc | Asymmetric data decompression systems |
US8553759B2 (en) | 2001-02-13 | 2013-10-08 | Realtime Data, Llc | Bandwidth sensitive data compression and decompression |
US8929442B2 (en) | 2001-02-13 | 2015-01-06 | Realtime Data, Llc | System and methods for video and audio data distribution |
US8073047B2 (en) | 2001-02-13 | 2011-12-06 | Realtime Data, Llc | Bandwidth sensitive data compression and decompression |
US8054879B2 (en) | 2001-02-13 | 2011-11-08 | Realtime Data Llc | Bandwidth sensitive data compression and decompression |
US8934535B2 (en) | 2001-02-13 | 2015-01-13 | Realtime Data Llc | Systems and methods for video and audio data storage and distribution |
US7073054B2 (en) | 2002-01-03 | 2006-07-04 | Samsung Electronics Co., Ltd. | Computer system and method for booting up the same |
US20060206703A1 (en) * | 2002-01-03 | 2006-09-14 | Samsung Electronics Co., Ltd. | Computer system and method for booting up the same |
US7721081B2 (en) | 2002-01-03 | 2010-05-18 | Samsung Electronics Co., Ltd. | Computer system and method for booting up the same |
US20030126427A1 (en) * | 2002-01-03 | 2003-07-03 | Samsung Electronics Co., Ltd. | Computer system and method for booting up the same |
EP1630640A4 (en) * | 2003-04-17 | 2007-03-14 | Matsushita Electric Ind Co Ltd | Start time reduction device and electronic device |
US7257702B2 (en) | 2003-04-17 | 2007-08-14 | Matsushita Electric Industrial Co., Ltd. | Boot time reducing device including boot preparation instructing unit |
EP1630640A1 (en) * | 2003-04-17 | 2006-03-01 | Matsushita Electric Industrial Co., Ltd. | Start time reduction device and electronic device |
CN100454206C (en) * | 2003-04-17 | 2009-01-21 | 松下电器产业株式会社 | Start time reduction device and electronic device |
US7334146B2 (en) * | 2003-12-09 | 2008-02-19 | Canon Kabushiki Kaisha | Method for controlling an image processing apparatus based on a power supply status |
US20050138447A1 (en) * | 2003-12-09 | 2005-06-23 | Canon Kabushiki Kaisha | Image processing apparatus and control method therefor |
US20070011443A1 (en) * | 2004-06-24 | 2007-01-11 | Fujitsu Limited | Computer startup method, program, storage medium, and information processing apparatus |
US20090013198A1 (en) * | 2004-11-09 | 2009-01-08 | Kabushiki Kaisha Toshiba | Electronic apparatus with improved memory power management |
US20060098512A1 (en) * | 2004-11-09 | 2006-05-11 | Kabushiki Kaisha Toshiba | Electronic apparatus |
US20070005952A1 (en) * | 2005-06-30 | 2007-01-04 | Kuan-Jui Ho | Boot-up method for computer system |
US8266418B2 (en) * | 2006-07-31 | 2012-09-11 | Yun Dong-Goo | Computer system and method of booting the same |
US20100005285A1 (en) * | 2006-07-31 | 2010-01-07 | Yun Dong-Goo | Computer system and method of booting the same |
US20080086591A1 (en) * | 2006-10-06 | 2008-04-10 | Nec Infrontia Corporation | Quick start |
US7979687B2 (en) * | 2006-10-06 | 2011-07-12 | Nec Infrontia Corporation | Quick start |
US20100192010A1 (en) * | 2009-01-29 | 2010-07-29 | Funai Electric Co., Ltd. | Electronic device |
US8397086B2 (en) * | 2009-01-29 | 2013-03-12 | Funai Electric Co., Ltd. | Electronic device |
US20110016300A1 (en) * | 2009-07-14 | 2011-01-20 | Lee Joocheol | Apparatus and method for fast booting computer system |
US20110055539A1 (en) * | 2009-08-31 | 2011-03-03 | Nintendo Co., Ltd. | Information processing apparatus, and computer-readable storage medium having startup/shutdown control program stored therein |
US9250678B2 (en) | 2009-08-31 | 2016-02-02 | Nintendo Co., Ltd. | Information processing apparatus, and computer-readable storage medium having startup/shutdown control program stored therein |
US20120254601A1 (en) * | 2011-03-28 | 2012-10-04 | Western Digital Technologies, Inc. | Disk drive booting from volatile semiconductor memory when exiting power save mode |
US8601248B2 (en) * | 2011-03-28 | 2013-12-03 | Western Digital Technologies, Inc. | Disk drive booting from volatile semiconductor memory when exiting power save mode |
US9286079B1 (en) * | 2011-06-30 | 2016-03-15 | Western Digital Technologies, Inc. | Cache optimization of a data storage device based on progress of boot commands |
US9104446B2 (en) * | 2011-11-30 | 2015-08-11 | Mitsubishi Electric Corporation | Broadcast receiving apparatus which performs start-up processing using software data confirmed to be initial-state software data by comparing versions in storage devices |
US20130139212A1 (en) * | 2011-11-30 | 2013-05-30 | Jun Yukawa | Information processing apparatus, broadcast receiving apparatus and software start-up method |
US20170142334A1 (en) * | 2015-11-16 | 2017-05-18 | Canon Kabushiki Kaisha | Communication apparatus, control method for the communication apparatus, and recording medium |
US10277815B2 (en) * | 2015-11-16 | 2019-04-30 | Canon Kabushiki Kaisha | Communication apparatus, control method for the communication apparatus, and recording medium |
Also Published As
Publication number | Publication date |
---|---|
JPH11184703A (en) | 1999-07-09 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
US6226740B1 (en) | Information processing apparatus and method that uses first and second power supplies for reducing booting time | |
US5471624A (en) | Apparatus and method for suspending and resuming software applications on a computer | |
US5854937A (en) | Method for reprogramming flash ROM in a personal computer implementing an EISA bus system | |
US5485623A (en) | Information processor having high speed and safety resume system | |
US20050055598A1 (en) | Booting method capable of executing a warm boot or a cold boot when a CPU crash occurs and computer system therefor | |
US6282644B1 (en) | Apparatus and method for storing BIOS data of computer system | |
JPH0764770A (en) | Microcontroller apparatus provided with remotely writable eprom and writing method | |
US6158002A (en) | Method and apparatus of boot device switching by a floppy disk | |
US6446139B1 (en) | Multiple chip single image BIOS | |
US20020103984A1 (en) | Information processing system, information processing method and readable-by-computer recording medium | |
US20020026601A1 (en) | Information processing apparatus with central processing unit and main memory having power saving mode, and power saving controlling method | |
US20060206652A1 (en) | Machine state storage apparatus and method | |
US20040225874A1 (en) | Method for reduced BIOS boot time | |
US7657716B2 (en) | Save and restore of a protected area | |
KR100223844B1 (en) | Option circuit | |
JPS6340925A (en) | Memory initializing system | |
EP0287600B1 (en) | Method and device to execute two instruction sequences in an order determined in advance | |
JP3082344B2 (en) | Disk file control device and update method | |
JPH1139143A (en) | Arithmetic unit, control method therefor, storage medium storing control program of the unit, electronic circuit device utilizing arithmetic unit, control method therefor and storage medium storing control program of the device | |
US20110047339A1 (en) | Information processing apparatus and method of backing up memory in said apparatus | |
JPH10283172A (en) | Flash rom data rewrite system | |
JPH10254780A (en) | Disk cache control system | |
JPH05324117A (en) | Information processor | |
KR100292155B1 (en) | Digital computer having easy operation environment and using method thereof | |
JPH06119256A (en) | Memory check system |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
AS | Assignment |
Owner name: NEC CORPORATION, JAPAN Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNOR:IGA, KAZUHISA;REEL/FRAME:009683/0762 Effective date: 19981214 |
|
FEPP | Fee payment procedure |
Free format text: PAYOR NUMBER ASSIGNED (ORIGINAL EVENT CODE: ASPN); ENTITY STATUS OF PATENT OWNER: LARGE ENTITY |
|
FPAY | Fee payment |
Year of fee payment: 4 |
|
FPAY | Fee payment |
Year of fee payment: 8 |
|
AS | Assignment |
Owner name: CRESCENT MOON, LLC, CALIFORNIA Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNOR:NEC CORPORATION;REEL/FRAME:022960/0466 Effective date: 20090616 |
|
AS | Assignment |
Owner name: RPX CORPORATION, CALIFORNIA Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNOR:OAR ISLAND LLC;REEL/FRAME:028146/0023 Effective date: 20120420 |
|
REMI | Maintenance fee reminder mailed | ||
LAPS | Lapse for failure to pay maintenance fees | ||
STCH | Information on status: patent discontinuation |
Free format text: PATENT EXPIRED DUE TO NONPAYMENT OF MAINTENANCE FEES UNDER 37 CFR 1.362 |
|
FP | Lapsed due to failure to pay maintenance fee |
Effective date: 20130501 |
|
AS | Assignment |
Owner name: RPX CORPORATION, CALIFORNIA Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNOR:HTC CORPORATION;REEL/FRAME:030870/0450 Effective date: 20130703 |
|
AS | Assignment |
Owner name: HTC CORPORATION, TAIWAN Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNOR:RPX CORPORATION;REEL/FRAME:030935/0943 Effective date: 20130718 |