WO2013192633A3 - Virtual memory module - Google Patents
Virtual memory module Download PDFInfo
- Publication number
- WO2013192633A3 WO2013192633A3 PCT/US2013/049434 US2013049434W WO2013192633A3 WO 2013192633 A3 WO2013192633 A3 WO 2013192633A3 US 2013049434 W US2013049434 W US 2013049434W WO 2013192633 A3 WO2013192633 A3 WO 2013192633A3
- Authority
- WO
- WIPO (PCT)
- Prior art keywords
- host
- memory device
- mass memory
- processing resources
- available
- Prior art date
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
- G06F3/0601—Interfaces specially adapted for storage systems
- G06F3/0602—Interfaces specially adapted for storage systems specifically adapted to achieve a particular effect
- G06F3/0604—Improving or facilitating administration, e.g. storage management
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/46—Multiprogramming arrangements
- G06F9/50—Allocation of resources, e.g. of the central processing unit [CPU]
- G06F9/5005—Allocation of resources, e.g. of the central processing unit [CPU] to service a request
- G06F9/5011—Allocation of resources, e.g. of the central processing unit [CPU] to service a request the resources being hardware resources other than CPUs, Servers and Terminals
- G06F9/5016—Allocation of resources, e.g. of the central processing unit [CPU] to service a request the resources being hardware resources other than CPUs, Servers and Terminals the resource being the memory
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
- G06F3/0601—Interfaces specially adapted for storage systems
- G06F3/0628—Interfaces specially adapted for storage systems making use of a particular technique
- G06F3/0653—Monitoring storage devices or systems
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
- G06F3/0601—Interfaces specially adapted for storage systems
- G06F3/0668—Interfaces specially adapted for storage systems adopting a particular infrastructure
- G06F3/0671—In-line storage system
- G06F3/0673—Single storage device
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/46—Multiprogramming arrangements
- G06F9/50—Allocation of resources, e.g. of the central processing unit [CPU]
- G06F9/5005—Allocation of resources, e.g. of the central processing unit [CPU] to service a request
Abstract
A memory controller of a mass memory device determining that a memory operation has been initiated which involves the mass memory device, and in response dynamically checks for available processing resources of a host device that is operatively coupled to the mass memory device and thereafter puts at least one of the available processing resources into use for performing the memory operation. In various non-limiting examples: the available processing resources maybe a core engine of a multi-core CPU, a DPS or a graphics processor; central processing unit; a digital signal processor; and a graphics processor; and it may also be dynamically checked whether memory resources of the host are available and those can be similarly put into use (e.g., write data to a DRAM of the host, process data in the DRAM with the host DSP, then write the processed data to the mass memory device).
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US13/527,745 | 2012-06-20 | ||
US13/527,745 US9164804B2 (en) | 2012-06-20 | 2012-06-20 | Virtual memory module |
Publications (2)
Publication Number | Publication Date |
---|---|
WO2013192633A2 WO2013192633A2 (en) | 2013-12-27 |
WO2013192633A3 true WO2013192633A3 (en) | 2014-06-12 |
Family
ID=49769745
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
PCT/US2013/049434 WO2013192633A2 (en) | 2012-06-20 | 2013-07-05 | Virtual memory module |
Country Status (2)
Country | Link |
---|---|
US (2) | US9164804B2 (en) |
WO (1) | WO2013192633A2 (en) |
Families Citing this family (9)
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US9311226B2 (en) | 2012-04-20 | 2016-04-12 | Memory Technologies Llc | Managing operational state data of a memory module using host memory in association with state change |
US9116820B2 (en) | 2012-08-28 | 2015-08-25 | Memory Technologies Llc | Dynamic central cache memory |
US9146928B1 (en) * | 2012-12-31 | 2015-09-29 | Emc Corporation | Techniques for storing metadata of a filesystem in persistent memory |
US9785545B2 (en) * | 2013-07-15 | 2017-10-10 | Cnex Labs, Inc. | Method and apparatus for providing dual memory access to non-volatile memory |
US10229043B2 (en) | 2013-07-23 | 2019-03-12 | Intel Business Machines Corporation | Requesting memory spaces and resources using a memory controller |
US9710381B2 (en) | 2014-06-18 | 2017-07-18 | International Business Machines Corporation | Method and apparatus for cache memory data processing |
CN110489356B (en) * | 2019-08-06 | 2022-02-22 | 上海商汤智能科技有限公司 | Information processing method, information processing device, electronic equipment and storage medium |
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2012
- 2012-06-20 US US13/527,745 patent/US9164804B2/en active Active
-
2013
- 2013-07-05 WO PCT/US2013/049434 patent/WO2013192633A2/en active Application Filing
-
2015
- 2015-09-23 US US14/863,253 patent/US20160062659A1/en not_active Abandoned
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Also Published As
Publication number | Publication date |
---|---|
US9164804B2 (en) | 2015-10-20 |
US20160062659A1 (en) | 2016-03-03 |
US20130346668A1 (en) | 2013-12-26 |
WO2013192633A2 (en) | 2013-12-27 |
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